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MCP Tools

Electronics Tools

Schematic, PCB, DRC, and fabrication export tools

The MCP server includes seven tools for electronic design: schematic capture, PCB layout, validation, fabrication export, and impedance calculation. These operate on electronics data embedded in the vcad document alongside mechanical geometry, enabling integrated MCAD/ECAD workflows.

create_schematic

Creates a schematic sheet with components, wires, and net labels. This is the starting point for any electronics design -- define your components and their connections, and the tool generates a netlist that drives PCB layout.

titlestringoptional

Schematic sheet title for display and documentation.

componentsarrayrequired

Array of component definitions. Each component has a reference designator, value, footprint ID, position on the sheet, and pin definitions.

wiresarrayoptional

Array of wire segments connecting pins. Each wire has start and end coordinates {x1, y1, x2, y2}.

labelsarrayoptional

Array of net labels. Each label has a name, position {x, y}, and scope (Local, Global, or Hierarchical).

Component Definition

FieldTypeRequiredDescription
refstringyesReference designator (R1, U3, C5)
valuestringyesComponent value or part number
footprintstringyesFootprint ID (e.g., "Resistor_SMD:R_0805")
xnumberyesX position on schematic sheet
ynumberyesY position on schematic sheet
rotationnumbernoRotation in degrees (default 0)
pinsarrayyesPin definitions (see below)

Pin Definition

FieldTypeRequiredDescription
numberstringyesPin number (e.g., "1", "2")
namestringyesPin name (e.g., "VCC", "GND", "A")
typestringyesPin type: Input, Output, Passive, PowerInput, PowerOutput, Bidirectional, NotConnected
xnumbernoPin position relative to component
ynumbernoPin position relative to component

Return Value

Returns the document with schematic data attached, plus a summary of components, wires, and labels created.

place_components

Takes a document with schematic data and creates a PCB with placed footprints, board outline, layer stackup, and design rules.

documentDocumentrequired

IR document with schematic data (from create_schematic).

board_widthnumber (mm)required

Board width in millimeters.

board_heightnumber (mm)required

Board height in millimeters.

board_thicknessnumber (mm)optional

Board thickness. Default 1.6mm (standard 2-layer FR4).

strategystringoptional

Placement strategy: "grid" (default) arranges components in a regular grid with automatic spacing.

The tool generates a 2-layer stackup (F.Cu/B.Cu with 35um copper on 1.53mm FR4 core, Er=4.5) and default design rules (0.25mm trace, 0.2mm clearance, 0.8mm via, 0.4mm drill, 0.5mm edge clearance). Components are placed on the front copper layer with pads created from schematic pin data.

The board also appears as a 3D node in the document, rendered with FR4-green material in the viewport.

route_nets

Routes copper traces between pads on a PCB based on the netlist.

documentDocumentrequired

IR document with PCB data (from place_components).

netsstring[]optional

Specific net IDs to route. If empty or omitted, routes all nets.

trace_widthnumber (mm)optional

Trace width override. Defaults to the design rules default (0.25mm).

The router uses direct point-to-point connections on the front copper layer. For each net with two or more pads, it creates traces connecting pads sequentially. Returns a summary of nets routed and traces added.

Router capabilities

The current router handles direct connections without obstacle avoidance. For complex boards, manual trace adjustment may be needed after auto-routing. Advanced routing strategies (A* pathfinding, differential pair routing) are planned.

run_drc

Runs Design Rule Check on a PCB layout, validating physical manufacturing constraints.

documentDocumentrequired

IR document with PCB data.

Checks Performed

RuleDescription
MinTraceWidthTrace width meets minimum from design rules
MinDrillVia and pad drill sizes meet minimum
AnnularRingVia annular ring (copper ring around drill) meets minimum
EdgeClearanceCopper features maintain minimum distance from board edge

Return Value

{
  "success": true,
  "violations": 2,
  "errors": 1,
  "warnings": 1,
  "details": [
    {
      "rule": "MinTraceWidth",
      "severity": "Error",
      "message": "Trace width 0.15mm < minimum 0.25mm",
      "position": { "x": 12.5, "y": 8.3 }
    }
  ]
}

Each violation includes the rule name, severity (Error or Warning), a descriptive message, and the board position where the violation occurs.

run_erc

Runs Electrical Rule Check on a schematic, validating logical correctness.

documentDocumentrequired

IR document with schematic data.

Checks Performed

CheckSeverityDescription
Duplicate referencesErrorSame reference designator used more than once
Unconnected power pinsErrorPowerInput pins with no wire connection
Unconnected signal pinsWarningNon-power pins with no wire connection

Return Value

Same format as run_drc: a summary with violation count and detailed error/warning list.

export_gerber

Exports Gerber RS-274X fabrication files, drill files, BOM, and pick-and-place data for PCB manufacturing.

documentDocumentrequired

IR document with PCB data.

output_dirstringrequired

Directory path where fabrication files will be written.

Output Files

FileFormatDescription
FCu.gbrGerber RS-274XFront copper layer
BCu.gbrGerber RS-274XBack copper layer
FMask.gbrGerber RS-274XFront solder mask
FPaste.gbrGerber RS-274XFront solder paste
drill.drlExcellonDrill file for vias and through-hole pads
pick_place.csvCSVComponent placement data for assembly
bom.csvCSVBill of materials

The tool generates one Gerber file per copper and mask layer found in the design, plus drill and assembly files. Only layers that contain features are exported.

calc_impedance

Calculates trace impedance for controlled-impedance routing. Supports microstrip, stripline, and differential pair configurations.

trace_widthnumber (mm)required

Copper trace width.

dielectric_heightnumber (mm)required

Height of the dielectric layer between the trace and reference plane.

copper_thicknessnumber (mm)optional

Copper thickness. Default 0.035mm (1oz copper).

dielectric_ernumberoptional

Relative permittivity of the dielectric. Default 4.5 (standard FR4).

trace_typestringoptional

Configuration: "microstrip" (default, outer layer trace), "stripline" (inner layer between two planes), "diff_microstrip" (differential pair on outer layer), "diff_stripline" (differential pair on inner layer).

spacingnumber (mm)optional

Spacing between traces for differential pair calculations.

Return Value

{
  "z0": 50.23,
  "er_eff": 3.456,
  "delay_ps_per_mm": 6.198,
  "trace_type": "microstrip",
  "inputs": {
    "trace_width": 0.2,
    "copper_thickness": 0.035,
    "dielectric_height": 0.2,
    "dielectric_er": 4.5
  }
}
FieldTypeDescription
z0numberCharacteristic impedance in ohms
er_effnumberEffective dielectric constant
delay_ps_per_mmnumberSignal propagation delay in picoseconds per millimeter
z_diffnumberDifferential impedance in ohms (only for differential pair types)

The impedance calculations use closed-form approximations (Hammerstad-Jensen for microstrip, Wheeler for stripline) with copper thickness correction. These are accurate to within 2-3% for typical PCB geometries and are suitable for design-phase estimation.

50-ohm traces

For a standard 2-layer FR4 board (1.53mm dielectric, Er=4.5, 1oz copper), a 50-ohm microstrip trace is approximately 2.8mm wide. Use calc_impedance to find the exact width for your stackup.

For workflow guides, see the Schematic, PCB Layout, DRC, Impedance, and Fabrication guides.